Actually we do enable the AMD P State drive in our kernel:
CONFIG_X86_AMD_PSTATE=y
but note that AMD PSTATE is not a governor (which you list above) but a backend driver.
The governor is what does the policy choices, the backend driver is what programs the hardware
Excellent feedback. Let me take a look at this and see if the changes to activate the backend (and the subsequent policy) work as expected. Thank you for the response.
amd_pstate CPPC has two operation modes: CPPC Autonomous(active) mode and CPPC non-autonomous(passive) mode. active mode and passive mode can be chosen by different kernel parameters. When in Autonomous mode, CPPC ignores requests done in the Desired Performance Target register and takes into account only the values set to the Minimum requested performance, Maximum requested performance, and Energy Performance Preference registers. When Autonomous is disabled, it only considers the Desired Performance Target.
Active Mode
amd_pstate=active
This is the low-level firmware control mode which is implemented by amd_pstate_epp driver with amd_pstate=active passed to the kernel in the command line. In this mode, amd_pstate_epp driver provides a hint to the hardware if software wants to bias toward performance (0x0) or energy efficiency (0xff) to the CPPC firmware. then CPPC power algorithm will calculate the runtime workload and adjust the realtime cores frequency according to the power supply and thermal, core voltage and some other hardware conditions.
Passive Mode
amd_pstate=passive
It will be enabled if the amd_pstate=passive is passed to the kernel in the command line. In this mode, amd_pstate driver software specifies a desired QoS target in the CPPC performance scale as a relative number. This can be expressed as percentage of nominal performance (infrastructure max). Below the nominal sustained performance level, desired performance expresses the average performance level of the processor subject to the Performance Reduction Tolerance register. Above the nominal performance level, processor must provide at least nominal performance requested and go higher if current operating conditions allow.
I ran my usual 4 hour stress test after the pstate change and the results were identical. A couple of tests varied by 2-3%. I didnt expect any difference since the governor for both was set to performance.
I did put in a set of DDR5-5600 and re-ran the test and it fell down after about 2 hours. But this build of Clear was 100% stable at DDR5-4800.
I will change the governor and retry at DDR5-5600 and see what/if happens.
This Zen 3 does not expose all of the pstate’s available in CPPC, i just want to see if I can find why I get a green screen of death.